TSMC CyberShuttle®TSMC IP

TSMC IP/Library List （シャトル品向け有償提供）

アナログIP、PLLなどのTSMCのIPはトッパンからご提供します。

 

0.35μm

Technology Product Type Library Name Version Feature In-Pairs
CL035G Standard Cell tcb773pdgo 260b TSMC 0.35um CMOS LOGIC/MS 3.3V/5V polycide process, core cell library, standard Vt, 10-track   
CL035P Standard Cell tcb773p 400e (Limited Release) Generic Std Cell, pure 3.3V Polycide Process. This library is only for pure 3.3V polycide process, not for 3.3V/5V process.   
CL035S Standard Cell tcb773s 210a 0.35um silicide core cell library. totaol 336 cells   
CL035S PLL pg33e2s 260b 200 MHz PLL_based clock generator   
CL035S PLL pg33e2s_lp 100a 200 MHz PLL_based clock generator   
CM035MG Standard Cell tcb035eh5v 260a TSMC 0.35um enhance 5V with 0.5um FEOL and 0.35um BEOL (hybrid) standard cell library  tcb670 
CV035MX Standard Cell tcb035phv 220c TSMC 0.35um CMOS High Voltage Mixed Signal Based BCD process, Standard Vt, 5V device library. 1.35um x-pitch, 10-track, total 398 cells(include 391 base cells, 7 filler cells)   
SG035 Standard Cell tcb773sgbi 100d (Limited Release) TSMC 0.35um SiGe process(3P3M), 3.3v, 328 cells   

0.25μm

Technology Product Type Library Name Version Feature In-Pairs
CL025E PLL pd22a1e 100c De-Skew PLL, Fout:50MHz~133MHz   
CL025E PLL pg22e1e 210a Clock generator PLL, Fout:50MHz~400MHz   
CL025E PLL pg22e2e 210a Clock generator PLL, Fout:25MHz~200MHz   
CL025E PLL pg22e2e_lp 210a Clock generator PLL, VCO:100MHz~200MHz   
CL025G Standard Cell tcb025s 270a TSMC 0.25um Logic 1P4M Salicide 2.5/5V process. Standard cell library with 5V IO device, wider operating supply voltage from 4.5V to 5.5V   
CL025G PLL pg22e1 261a Clock generator PLL, Fout:50MHz~400MHz   
CL025G Standard I/O tpb025v 160a bond pad library  tpa025nv
tpz025nv 
CL025G Standard I/O tpz873g_analog 100c 0.25um generic, analog I/O, EZ-bond, total 35 cells, for TSMC analog IP only   
CL025G Standard I/O tpz873gez 230b staggered 0.25, 2.5/3.3/5VT digital I/O library ibis kit re-generated   
CL025G Standard I/O tpz873n_analog 100b 0.25um generic, analog I/O, linear bond, total 33 cells, for TSMC analog IP only   
CL025G Standard I/O tpz873nez 230c ibis kit re-generated   
CL025G Standard I/O tpa025nv 270a (Limited Release) 2.5V/3.3V, universal analog I/O compatible with linear universal standard I/O  tpb025v
tpz025nv 
CL025G Standard I/O tpz025nv 250a (Limited Release) 2.5V/3.3V, 5V Tolerant, Linear Universal Standard I/O   
CM025MG Standard I/O tpb025v 160a bond pad library  tpa025nv
tpz025nv 
CV025LG Standard I/O tps025bcdnv5 140a 5V/5V, Regular, Linear Universal Standard I/O  tpb025v 
CV025LH Standard I/O tpd025bcdnv5 140a 2.5V/5V, Regular, Linear Universal Standard I/O  tpb025v 

 

0.18μm

Technology Product Type Library Name Version Feature In-Pairs
CL018G Standard Cell tcb018g3d3 280a TSMC 0.18um cmos logic general purpose 1.8V/3.3Vprocess, core cell library, 3.3V I/O device, standard Vt, 9-track   
CL018G Standard Cell tcb018gbwp7t 270a TSMC 0.18um Logic 1.8V/3.3V general purpose process (1P6M, core 1.8V), Standard Vt, 7-track METAL1 only library. 0.56um x-pitch, total 568 cells (include 560 base cells, 7 filler cells, 1 tapcell), Raw gate density = 140 Kgate/mm^2   
CL018G Standard Cell tcb018rfid 280a TSMC 0.18um CMOS mixed signal RF general purpose, standard Vt, 7-track M1 only library at 1.0V for RFID application with additional level-shifter cells, low-power d-flip-flops.   
CL018G Standard Cell tcb018ghdbw_c090210 270a (Limited Release) Re-characterize 0.18um 7-track M1 only library at 0.77V with forward bias for RFID application with additional level-shifter cells, low-power d-flip-flops. Total 114 cells   
CL018G Standard Cell tcb018ghdbwp_c090210 270a (Limited Release) Re-characterize 0.18um 7-track M1 only library at 1.0V for RFID application with additional level-shifter cells, low-power d-flip-flops. Total 113 cells   
CL018G PLL pg18a1 230c Clock Generator PLL, Fout: 250-700 MHz   
CL018G PLL pg18e1 230d Clock Generator PLL, Fout:50-500MHz   
CL018G DAC tda1810ax3_tm866 280b (Limited Release) TSMC CL018G 1.8V/3.3V 10-bit 3-channel 240MHz Video DAC   
CL018G SSTL tpd973g_sstl2_ddr400 280b 1.8V/3.3V memory IO library for DDR1 applications. 2.5V DDR1, support 400Mbps.  tpa973gv_280a
tpb973gv_140a
tpi973gv_250a
tpz973gv_280a 
CL018G USB I/O tpd973g_usb 270a This library is modified from tpz973g_usb_230b that update DRC version to T-018-LO-DR-001-C1 2.7B and enhance ESD protection.  tcb018ghp_250b
tpb973gv_130a
tpz973g_analog_240b
tpz973gv_270a 
CL018G USB I/O thd973g_susb2otg 280b (Limited Release) 0.18um logic general purpose 1.8V/3.3V USB2.0 OTG compliant with UTMI+ interface (level0~level3); Support USB2.0 host/hub/device and USB2.0 OTG dual-role device; Small area, low power and exclude ESD/pads   
CL018G Crystal Oscillator tpz973g_32kosc 240a 0.18um 1.8/3.3V Low Power 32KHz Crystal Oscillator I/O Pad   
CL018G Standard I/O tpa018nv 270a 1.8V/3.3V Universal Analog I/O Library Compatible with Tpd018nv/Tpz018nv   
CL018G Standard I/O tpa973gv 280a 1.8V/3.3V, universal analog I/O compatible with staggered universal standard I/O  tpb973gv_140atpz973gv_280a 
CL018G Standard I/O tpb018v 150b Bond pad library  tpa018nv
tpd0152nv3_sd_sl
tpd018bcdnv5
tpd018nv
tph018nv3_sl
tpz018nv 
CL018G Standard I/O tpb973gv 140a Bond pad library  tpa973gv_260a
tpz0152gv_280a
tpz016gv_280a
tpz973gv_280a 
CL018G Standard I/O tpd018nv 280a 1.8V/3.3V, regular, linear universal standard I/O  tpb018v_140a 
CL018G Standard I/O tph018nv3_sl 280b 1.8V/3.3V, hybrid linear slim I/O library that contains both standard and analog slim I/O  tpb018v_150a 
CL018G Standard I/O tpi018nv 270a Interface Library for 0.18um Linear Universal Standard I/O   
CL018G Standard I/O tpi973gv 250a 0.18um interconnection (bridge) library for 0.18um staggered universal standard I/O   
CL018G Standard I/O tpz018nv 280b 1.8V/3.3V, 5V Tolerant, Linear Universal Standard I/O  tpa018nv
tpb018v 
CL018G Standard I/O tpz973gv 280a 1.8V/3.3V, 5V Tolerant, Staggered Universal Standard I/O  tpb973gv_130a 
CL018G Standard I/O tpd018fnv_sc 100a (Limited Release) 1.8V/3.3V Regular, Linear Standard I/O    
CL018G Standard I/O tpd018nv_ee 280a (Limited Release) 1.8V/3.3V, Regular, Linear Universal Standard I/O  tpb018v_140a 
CL018LP Standard I/O tpb018v 150b Bond pad library  tpa018nv
tpd0152nv3_sd_sl
tpd018bcdnv5
tpd018nv
tph018nv3_sl
tpz018nv 
CL018LP Standard I/O tpd018lpnv 280a 1.8V/3.3V, regular, linear universal standard I/O  tpb018v_140a 
CL018LP Standard I/O tph018lpnv3_sl 280a 1.8V/3.3V, hybrid linear slim I/O library that contains both standard and analog slim I/O  tpb018v_150a 
CL018LV PLL pg18e2lv 130a 400MHZ PLL-based Clock Generator   

0.13μm

Technology Product Type Library Name Version Feature In-Pairs
CL013G Standard Cell tcb013ghp 220a TSMC 0.13um logic (1P8M) Generic High-Performance library.Standard -Vt, 9 tracks, Raw gate density = 196KGate/mm^2   
CL013G Standard Cell tcb013ghp_eco 211a TSMC 0.13um Generic Logic (1P8M, 1.2V/2.5V,3.3V) ECO library. This library is intended to serve logic changes with metals/contacts(vias) only ECO after first tape-out without having to touch base layers of CO layer and below   
CL013G Standard Cell tcb013ghphvt 220a TSMC 0.13um logic (1P8M) Generic High-Performance library. Hight-Vt,9 tracks, Raw gate density = 196KGate/mm^2   
CL013G Standard Cell tcb013ghphvt_eco 211a TSMC 0.13um Generic Logic (1P8M, 1.2V/2.5V,3.3V) ECO library. High-Vt, This library is intended to serve logic changes with metals/contacts(vias) only ECO after first tape-out without having to touch base layers of CO layer and below   
CL013G Standard Cell tcb013ghplvt 220a TSMC 0.13um logic (1P8M) Generic High-Performance library. Low-Vt ,9 tracks, Raw gate density = 196KGate/mm^2   
CL013G Standard Cell tcb013ghplvt_eco 211a TSMC 0.13um Generic Logic (1P8M, 1.2V/2.5V,3.3V) ECO library. Low-Vt, This library is intended to serve logic changes with metals/contacts(vias) only ECO after first tape-out without having to touch base layers of CO layer and below   
CL013G PLL pd13a1g2 230a 600MHz De-Skew PLL   
CL013G PLL pg13a0g3 200a 1.6GHz Clock Generator   
CL013G PLL pg13a1g3 220b Dual-power 1GHz PLL based clock generator for 1.2V/3.3V process.    
CL013G PLL pg13e3g 220e CL013G 1.2V Single-Power 400MHz PLL for Clock Generator   
CL013G PLL pg13g25smf1000 220c CL013G 1.2V/2.5V Process Single-power Multi-band 1GHz PLL   
CL013G DAC da13g25b10x3f250 220a (Limited Release) TSMC CL013G 1.2V/2.5V 10-bit 3-channel 250MHz Video DAC   
CL013G DAC da13g33b10x1f250 220c (Limited Release) TSMC CL013G 1.2V/3.3V 10-bit 1-channel 250MHz Video DAC   
CL013G DAC da13g33b10x3f250 220c (Limited Release) TSMC CL013G 1.2V/3.3V 10-bit 3-channel 250MHz Video DAC   
CL013G DAC da13g33b10x4f250 220f (Limited Release) TSMC CL013G 1.2V/3.3V 10-bit 4-channel 250MHz Video DAC   
CL013G USB I/O thd013g3_susb2otg 230a (Limited Release) 0.13um logic general purpose 1.2V/3.3V USB2.0 OTG compliant with UTMI+ interface (level0~level3); Support USB2.0 host/hub/device and USB2.0 OTG dual-role device; Small area, low power and exclude ESD/pads.   
CL013G DDR I/O tpd013gv3_memio_ddr2 220f 1.2V/3.3V memory IO library for DDR2/ DDR1/ MDDR/ LVCMOS applications. 1.8V DDR2, support 667Mbps with 150ohm/75ohm ODT. 1.8V MDDR18, support 266Mbps  tpb013gv_130b 
CL013G Crystal Oscillator tpd013gv_32kosc 220c 1.2V/3.3V 32KHz crystal oscillator I/O library Provide I/O cell operating with 32768Hz crystal device  tpb013gv_130c
tpd013nv3_sl_220a
tpi013gv_210a
tpz013gv3_220d 
CL013G Standard I/O tpa013nv2 220a 1.2V/2.5V Universal Analog I/O compatible with Linear Universal Standard I/O  tpb013nv_130a
tpd013nv2_220a 
CL013G Standard I/O tpa013nv3 220e 1.2V/3.3V Universal Analog I/O compatible with Linear Universal Standard I/O  tpb013nv_130a
tpd013nv3_220c 
CL013G Standard I/O tpb013v 230a Bond Pad Library  tpa013gv3_220e
tpa013nv3_220e
tpd013nv3_220d
tph013nv3_sl_230a
tpz013gv3_220d 
CL013G Standard I/O tpd013gv3_ssd 230a 1.2V/3.3V, regular, staggered universal standard I/O  tpb013v_230a
tpz013gv3_230a 
CL013G Standard I/O tpd013nv3 220d 1.2V/3.3V, Regular, Linear Universal Standard I/O  tpa013nv3_220e
tpb013nv_130a 
CL013G Standard I/O tph013nv2_sl 230a 1.2V/2.5V, hybrid linear slim I/O library that contains both standard and analog slim I/O  tpa011nv3_r080620_220a
tpb013v_230a
tpd013nv2_220b 
CL013G Standard I/O tph013nv3_sl 230a 1.2V/3.3V, hybrid linear slim I/O library that contains both standard and analog slim I/O  tpa011nv3_r080620_220a
tpb013v_230a
tpd013nv3_sl_220a 
CL013G Standard I/O tpi013gv 210a Interface Library for 0.13um Staggered Universal Standard I/O   
CL013G Standard I/O tpi013nv 220a 0.13um inter-connection library (bridge library) for linear universal standard I/O   
CL013G Standard I/O tpz013gv2 220b 1.2V/2.5V, 3.3V tolerant, staggered universal standard I/O  tpb013gv_130b 
CL013G Standard I/O tpz013gv3 230a 1.2V/3.3V, 5V tolerant, staggered universal standard I/O  tpa013gv3_220e
tpb013v_230a 
CL013G Standard I/O tpz013nv3 220b 5V tolerant, linear universal standard I/O  tpb013nv_130a 
CL013G Standard I/O tpa013gv2 220a (Limited Release) 1.2V/2.5V Universal Analog I/O compatible with Staggered Universal Standard I/O  tpb013gv_130b
tpz013gv2_220b 
CL013G Standard I/O tpa013gv3 220e (Limited Release) 1.2V/3.3V Universal Analog I/O compatible with Staggered Universal Standard I/O  tpb013gv_130b 
CL013G Standard I/O tpd013nv2 220b (Limited Release) 1.2V/2.5V, Regular, Linear Universal Standard I/O  tpa013nv2_220a
tpb013nv_130a 
CL013LP Standard Cell tcb013lphp 220a TSMC 0.13um Logic Low power Salicide (1P8M, 1.5V). High-performance (9 tracks).   
CL013LP Standard Cell tcb013lphp_eco 211a TSMC 0.13um Logic Low power Salicide (1P8M, 1.5V), This library is intended to serve logic changes with metals/contacts(vias) only ECO after first tape-out without having to touch base layers of CO layer and below   
CL013LP Standard Cell tcb013lphplvt 220a TSMC 0.13um Logic Low power Salicide (1P8M, 1.5V). High-performance (9 tracks).   
CL013LP Standard Cell tcb013lphplvt_eco 211a TSMC 0.13um Logic Low power Salicide (1P8M, 1.5V), Low-Vt, This library is intended to serve logic changes with metals/contacts(vias) only ECO after first tape-out without having to touch base layers of CO layer and below   
CL013LP PLL pg13lp25mf1000 200a 1GHz Clock Generator   
CL013LP PLL pg13lpsmf1000 200a 1.5V 1GHz Clock Generator   
CL013LP Standard I/O tpa013lpnv2 220a 1.5V/2.5V Universal Analog I/O compatible with Linear Universal Standard I/O  tpb013nv_130a
tpd013lpnv2_220a 
CL013LP Standard I/O tpa013lpnv3 220a 1.5V/3.3V Universal Analog I/O compatible with Linear Universal Standard I/O  tpb013nv_130a
tpd013lpnv3_220a 
CL013LP Standard I/O tpb013v 230a Bond Pad Library  tpa013gv3_220e
tpa013nv3_220e
tpd013nv3_220d
tph013nv3_sl_230a
tpz013gv3_220d 
CL013LP Standard I/O tpd013lpnv2 220b 1.5V/2.5V, Regular, Linear Universal Standard I/O  tpa013lpnv2_220a
tpb013nv_130a 
CL013LP Standard I/O tpd013lpnv3 220b 1.5V/3.3V, Regular, Linear Universal Standard I/O  tpa013lpnv3_220a
tpb013nv_130a 
CL013LP Standard I/O tph013lpnv3_sl 230a 1.5V/3.3V, regular, hybrid linear slim I/O  tpa013lpnv3_220a
tpb013v_230a 
CL013LV Standard Cell tcb013lvhp 220a TSMC 0.13um logic 1P8M Low-Voltage High-Performance library, Standard-Vt,Raw gate density = 196KGate/mm^2   
CL013LV Standard Cell tcb013lvhp_eco 211a TSMC 0.13um logic 1P8M Low-Voltage ECO library This library is intended to serve logic changes with metals/contacts(vias) only ECO after first tape-out without having to touch base layers of CO layer and below   
CL013LV Standard Cell tcb013lvhphvt 220a TSMC 0.13um logic 1P8M Low-Voltage High-Performance library, Height-Vt,Raw gate density = 196KGate/mm^2   
CL013LV Standard Cell tcb013lvhphvt_eco 211a TSMC 0.13um logic 1P8M Low-Voltage ECO library, High-Vt, This library is intended to serve logic changes with metals/contacts(vias) only ECO after first tape-out without having to touch base layers of CO layer and below   
CL013LV Standard Cell tcb013lvhpod 220a TSMC 0.13um logic 1P8M Low-Voltage High-Performance library, Over-Drive 1.2V, Standard-Vt,9 tracks, Raw gate density = 196KGate/mm^2   
CL013LV Standard Cell tcb013lvhpod_eco 211a TSMC 0.13um logic 1P8M Low-Voltage ECO library, Over-drive 1.2V, This library is intended to serve logic changes with metals/contacts(vias) only ECO after first tape-out without having to touch base layers of CO layer and below   
CL013LV Standard Cell tcb013lvhpodhvt 220a TSMC 0.13um logic 1P8M Low-Voltage High-Performance library, Height-Vt,Over-Drive 1.2V, Hight-VT,9 tracks, Raw gate density = 196KGate/mm^2   
CL013LV Standard Cell tcb013lvhpodhvt_eco 211a TSMC 0.13um logic 1P8M Low-Voltage ECO library, High-Vt, Over-drive 1.2V, This library is intended to serve logic changes with metals/contacts(vias) only ECO after first tape-out without having to touch base layers of CO layer and below   
CL013LV PLL pg13a1lv3 230a CLN90LV 1.0V/3.3V Process Dual-power 250MHz-1GHz PLL   
CL013LV PLL pg13lv25mf1000 230a CL013LV 1.0V/2.5V Multi-Band 1GHz PLL   
CL013LV Standard I/O tpa013lgv3 220c 1.0V/3.3V Universal Analog I/O compatible with Staggered Universal Standard I/O  tpb013gv_130b
tpz013lgv3_220b 
CL013LV Standard I/O tpb013v 230a Bond Pad Library  tpa013gv3_220e
tpa013nv3_220e
tpd013nv3_220d
tph013nv3_sl_230a
tpz013gv3_220d 
CL013LV Standard I/O tpz013lodgv3 230a 1.0V/3.3V, 5V tolerant, staggered universal standard I/O with core voltage overdriving to 1.2V  tpa013lgv3_220c
tpb013v_230a 
CL013LV Standard I/O tpa013lgv2 220a (Limited Release) 1.0V/2.5V Universal Analog I/O compatible with Staggered Universal Standard I/O  tpb013gv_130b 
CL013LV Standard I/O tpz013lgv2 220a (Limited Release) 1.0V/2.5V, 3.3V Tolerant, Staggered Universal Standard I/O  tpb013gv_130b
tpz013gv2_220b 
CL013LV Standard I/O tpz013lodgv2 220a (Limited Release) 1.0V/2.5V,3.3V tolerant , staggered universal standard I/O(core voltage overdrives to 1.2V)  tpb013gv_130b
tpz013gv2_220b 

90nm

Technology Product Type Library Name Version Feature
CLN90G PLL pdn90g25f800 150a CLN90G 1.0V/2.5V 800MHz De-skew PLL 
CLN90G PLL pgn90g25f1600 150a CLN90G 1.0V/2.5V 1.6GHz clock-generator PLL 
CLN90G PLL pgn90g33sf400 200a 1.0V single-power , 400MHz PLL with 2MHz-8MHz comparison freqency for CLN90G 1.0V/3.3V process 
CLN90G PLL pgn90gs33mf1000 220b CLN90G 1.0V/3.3V Process Single-power Multi-band 1GHz PLL 
CLN90G PLL pgn90gsf400 200a Single-power 400MHz PLL with 2 - 8MHz comparsion frequency for CLN90G 1.0V/2.5V process. 
CLN90G PLL pgn90gsmf1000 220b CLN90G 1.0V/2.5V Process Single-power Multi-band 1GHz PLL 
CLN90G DAC dan90g33b10x3f250 210b CLN90G 1.0V/3.3V 10-bit 250MHz Video DAC 
CLN90G USB I/O thdn90g3_susb2otg 220a (Limited Release) 90nm logic general purpose 1.0V/3.3V USB2.0 OTG compliant with UTMI+ interface (level0~level3); Support USB2.0 host/hub/device and USB2.0 OTG dual-role device; Small area, low power and exclude ESD/pads. 
CLN90G DDR I/O tpdn90gv3_memio_ddr2 220a (Limited Release) 1.0V/3.3Vmemory IO library for DDR2/ DDR1/ MDDR/ LVCMOS/LVTTL applications. 1.8V DDR2, support 667Mbps with 150ohm/75ohm ODT. 2.5V DDR1, support 400Mbps. 1.8V MDDR18, support 266Mbps. 2.5V LVCMOS, support 266Mbps. 3.3V LVTTL, support 266Mbps. 
CLN90G Standard I/O tpbn90gv_padsp 130a n90 universe bond pad for specialty I/O 
CLN90G Standard I/O tpbn90v 220a Bond Pad Library 
CLN90G Standard I/O tpdn90gv3_ssd 210b 1.0V/3.3V regular, staggered universal standard I/O 
CLN90G Standard I/O tphn90gv2_sl 220a 1.0V/2.5V, hybrid staggered slim I/O library that contains both standard and analog slim I/O 
CLN90G Standard I/O tphn90gv3_sl 220a 1.0V/3.3V, hybrid staggered slim I/O library that contains both standard and analog slim I/O 
CLN90G Standard I/O tphn90nv2_sl 220b 1.0V/2.5V, hybrid linear slim I/O library that contains both standard and analog slim I/O 
CLN90G Standard I/O tphn90nv3_sl 220b 1.0V/3.3V, hybrid linear slim I/O library that contains both standard and analog slim I/O 
CLN90G Standard I/O tpin90gv 150a This library contains adapter cells for bridging between staggered universal standard I/O and specialty I/O as well as for bridging between staggered universal standard I/O and staggered non-universal standard I/O 
CLN90G Standard I/O tpin90nv 150a This library contains adapter cells to bridge between N90 linear universal standard I/O and other TSMC IP. 
CLN90G Standard I/O tpzn90gv2 200a 1. Modified IO function cells for Vccmin improvement. 2. Modified RH layer to meet RES.10.g DRC added in version 2.0 design rule 
CLN90G Standard I/O tpzn90gv3 210a 1.0V/3.3V, 5V Tolerant, Staggered Universal Standard I/O 
CLN90G Standard I/O tpan90gv18 210a (Limited Release) 1.0V/1.8V universal analog I/O compatible with staggered universal standard I/O 
CLN90G Standard I/O tpan90gv2 210a (Limited Release) 1.0V/2.5V,universal analog I/O compatible with staggered universal standard I/O 
CLN90G Standard I/O tpan90gv3 210b (Limited Release) 1.0V/3.3V,universal analog I/O compatible with staggered universal standard I/O 
CLN90GT Standard I/O tpbn90v 220a Bond Pad Library 
CLN90HS Standard I/O tpbn90v 220a Bond Pad Library 
CLN90LP PLL pgn90lp25mf1000 220a CLN90LP 1.2V/2.5V Process Dual-power Multi-band 12.5MHz-1GHz PLL 
CLN90LP PLL pgn90lp25sf400 200a CLN90LP single-power (1.2V) 400MHz PLL for 1.2V/2.5V process 
CLN90LP PLL pgn90lp33smf1000 210c CLN90LP 1.2V/3.3V Process Single-power Multi-band 12.5MHz-1GHz PLL 
CLN90LP PLL pgn90lp33smf1000a 220b CLN90LP 1.2V/3.3V Process Single-power Multi-band 37.5MHz-1GHz PLL with enhanced jitter performance and area reduction 
CLN90LP PLL pgn90lpsmf1000 210b CLN90LP 1.2V/2.5V Process Single-power Multi-band 12.5MHz-1GHz PLL 
CLN90LP USB I/O thdn90lp3_susb2otg 220a (Limited Release) 90um LP 1.2V/3.3V USB2.0 OTG compliant with UTMI+ interface (level0~level3); Support USB2.0 host/hub/device and USB2.0 OTG dual-role device; Small area, low power and exclude ESD/pads. 
CLN90LP Crystal Oscillator tpdn90lpnv_32kosc 220a (Limited Release) 1.2V/3.3V 32KHz crystal oscillator I/O library Provide I/O cell operating with 32768Hz crystal device 
CLN90LP Standard I/O tpan90lpnv2 220a 1.2v/2.5v, Universal Analog I/O compatible with Linear Universal Standard I/O 
CLN90LP Standard I/O tpan90lpnv3 220a 1.2v/3.3v, Universal Analog I/O compatible with Linear Universal Standard I/O 
CLN90LP Standard I/O tpbn90v 220a Bond Pad Library 
CLN90LP Standard I/O tpdn90lpnv2 220a 1.2V/2.5V, Regular, Linear Universal Standard I/O 
CLN90LP Standard I/O tpdn90lpnv3 220a 1.2/3.3V, Regular, Linear Universal Standard I/O 
CLN90LP Standard I/O tpdn90lpnv3_sd_sl 220a 1.2V/3.3V, regular, linear standard slim I/O 
CLN90LP Standard I/O tphn90lpgv3_sl 220a 1.2V/3.3V, hybrid staggered slim I/O library that contains both standard and analog slim I/O 
CLN90LP Standard I/O tphn90lpnv3_sl 220b 1.2V/3.3V, hybrid linear slim I/O library that contains both standard and analog slim I/O 
CLN90UP Standard I/O tpbn90v 220a Bond Pad Library 

65nm

Technology Product Type Library Name Version Feature
CLN65G Standard I/O tpbn65v 200b bond pad library 
CLN65GP DDR I/O tpdn65gpgv2_memio_ddr2 200b 1.0V/2.5V memory IO library for DDR2/ DDR1/ MDDR/ LVCMOS applications. 1.8V DDR2, support 800Mbps with 150ohm/75ohm ODT. 2.5V DDR1, support 533Mbps. 1.8V MDDR18, support 400Mbps. 2.5V LVCMOS, support 400Mbps. 
CLN65GP Standard I/O tpan65gpgv2od3 200b 1.0V/2.5V overdrives to 3.3V, Universal Analog I/O compatible with Staggered Universal Standard I/O 
CLN65GP Standard I/O tpbn65v 200b bond pad library 
CLN65GP Standard I/O tpdn65gpgv2od3_sd 200a 1.0V/2.5V, over-drive to 3.3V, staggered universal standard I/O 
CLN65GP Standard I/O tpfn65gpgv2od3 200c 1.0V/2.5V, over-drive to 3.3V, fail-safe, staggered universal standard I/O 
CLN65GP Standard I/O tphn65gpgv2od3_sl 140a TSMC hybrid staggered slim I/O library that contains both digital and analog I/O cells 
CLN65GP Standard I/O tpin65gv 120a N65 Inter-connection library that contains the adapter (i.e. bridge) cells for N65 staggered universal I/O libraries. 
CLN65GP Standard I/O tpzn65gpgv2od3 200b 1.0V/2.5V, over-drive to 3.3V, 5V tolerant,, staggered universal standard I/O 
CLN65GP Standard I/O tpan65gpgv18 140b (Limited Release) 1.0V/1.8V, universal analog I/O compatible with staggered universal standard I/O 
CLN65GP Standard I/O tpfn65gpgv18 140b (Limited Release) 1.0V/1.8V, fail safe, staggered universal standard I/O 
CLN65LP SRAM Compiler tsmc_n65lpmc_20060901 140a 65nm Low Power MC2 object code 
CLN65LP SRAM Compiler tsn65lpdpsram_20060901 200b 65nm Low Power Dual-Port SRAM Compiler 
CLN65LP SRAM Compiler tsn65lplldpsram_20060901 200a 65nm Low Power Low Leakage Dual-Port SRAM Compiler 
CLN65LP SRAM Compiler tsn65lpllspsramwor_20060901 130a N65LP Low leakage Single Port SRAM compiler without redundancy 
CLN65LP SRAM Compiler tsn65lpspsramwor_20060901 140a 65nm Low Power Single Port SRAM without Redundancy Compiler  
CLN65LP SRAM Compiler tsn65lpd62spsram_20060901 200a (Limited Release) 65nm Low Power D62 Single Port SRAM Compiler 
CLN65LP SRAM Compiler tsn65lphs1prf_20100200 200b (Limited Release) 65nm Low Power High Performance One Port Register File Compiler 
CLN65LP SRAM Compiler tsn65lphsspsram_20100200 200d (Limited Release) 65nm Low Power High Performance Single Port SRAM Compiler 
CLN65LP SRAM Compiler tsn65lpspsramwor_20060901 130b (Limited Release) 65nm Low Power Single Port SRAM without Redundancy Compiler  
CLN65LP ROM tsn65lpllsrom_20060901 140a N65LP Low Leakage ROM compiler revision release  
CLN65LP ROM tsn65lpsrom_20060901 140b 65nm Low Power Contact Programmable High Density Read-Only Memory Compiler  
CLN65LP PLL pgn65lp25f1600 200a CLN65LP 1.2V/2.5V Process Dual-power 100MHz - 1600MHz PLL 
CLN65LP PLL pgn65lp25mf1000a 140c CLN65LP 1.2V/2.5V Dual-Power 1GHz PLL with enhanced jitter performance and area reduction. 
CLN65LP PLL pgn65lp25smf1000a 140a CLN65LP 1.2V/2.5V Single-Power 1GHz PLL with enhanced jitter performance and area reduction.  
CLN65LP DAC dan65lpod33b10x3f250 200a TSMC CLN65LP 1.2V/2.5V OD33 10-bit 250MHz Video DAC (For both IO 2.5V and 3.3V application) 
CLN65LP Register File tsn65lp1prf_20060901 140b 65nm Low Power One Port Register File Compiler 
CLN65LP Register File tsn65lp2prf_20060901 200a 65nm Low Power Two Port Register File Compiler 
CLN65LP Register File tsn65lpll1prf_20060901 140a 65nm Low Power Low Leakage One-Port Register File SRAM Compiler  
CLN65LP Register File tsn65lpll2prf_20060901 200a 65nm Low Power Low Leakage Two-Port Register File Compiler 
CLN65LP USB I/O thdn65lp2od_susb2otg 200a (Limited Release) 65nm low power overdrive process 1.2V/3.3V USB2.0 OTG compliant with UTMI+ interface (level0~level3); Support USB2.0 host/hub/device and USB2.0 OTG dual-role device; Small area, low power and exclude ESD/pads. 
CLN65LP DDR I/O tpdn65lpgv2_memio_ddr2 200a 1.2V/2.5V memory IO library for DDR2/ DDR1/ MDDR/ LVCMOS applications. 1.8V DDR2, support 800Mbps with 150ohm/75ohm ODT. 2.5V DDR1, support 533Mbps. 1.8V MDDR18, support 400Mbps. 2.5V LVCMOS, support 400Mbps. 
CLN65LP I2C application I/O tpzn65lpodgv2_iic 200a (Limited Release) An I2C-bus for both standard-mode (100k bits/s), and fast-mode (400k bits/s) data transmission 
CLN65LP Crystal Oscillator tpdn65lpgv_32kosc 200a 1.2V/2.5V 32KHz crystal oscillator I/O library Provide I/O cell operating with 32768Hz crystal device 
CLN65LP Standard I/O tpan65lpgv2od3 200a 1.2V/2.5V overdrives to 3.3V, Universal Analog I/O compatible with Staggered Universal Standard I/O 
CLN65LP Standard I/O tpan65lpnv2od3 200b 1.2V/2.5V,over-drive to 3.3V, universal analog I/O compatible with linear universal standard I/O 
CLN65LP Standard I/O tpbn65v 200b bond pad library 
CLN65LP Standard I/O tpdn65lpgv2od3_sd 200a 1.2V/2.5V, over-drive to 3.3V, staggered universal standard I/O 
CLN65LP Standard I/O tpdn65lpnv2od3 200a 1.2V/2.5V, over-drive to 3.3V, regular, linear universal standard I/O 
CLN65LP Standard I/O tpfn65lpgv2od3 200c 1.2V/2.5V, over-drive to 3.3V, fail-safe, staggered universal standard I/O 
CLN65LP Standard I/O tphn65lpgv2od3_sl 140a TSMC hybrid staggered slim I/O library that contains both digital and analog I/O cells 
CLN65LP Standard I/O tphn65lpnv2od3_sl 200a 1.2V/2.5V, hybrid linear slim I/O library that contains both standard and analog slim I/O 
CLN65LP Standard I/O tpin65gv 120a N65 Inter-connection library that contains the adapter (i.e. bridge) cells for N65 staggered universal I/O libraries. 
CLN65LP Standard I/O tpin65nv 130b N65 interconnection library for linear universal I/O 
CLN65LP Standard I/O tpzn65lpgv2od3 200b 1.2V/2.5V, over-drive to 3.3V, 5V tolerant, staggered universal standard I/O 
CLN65ULP SRAM Compiler tsmc_n65ulpmc_20070503 140a N65ULP sram compiler object code file 
CLN65ULP SRAM Compiler tsn65ulpdpsram_20070503 140a 65nm Ultra Low Power Dual-Port SRAM Compiler  
CLN65ULP SRAM Compiler tsn65ulpspsramwor_20070503 140b N65ULP SP SRAM without redundancy revision 140b release 
CLN65ULP SRAM Compiler tsn65ulpsrom_20070503 140a 65nm Ultra Low Power Contact Programmable High Density Read-Only Memory Compiler  
CLN65ULP ROM tsn65ulpllsrom_20070503 140a 65nm Ultra Low Leakage Low Power Contact Programmable High Density Read-Only Memory Compiler  
CLN65ULP Register File tsn65ulp2prf_20070503 140c 65nm Ultra Low Power Two-Port Register File Compiler 
CLN65ULP Standard I/O tpin65gv 120a N65 Inter-connection library that contains the adapter (i.e. bridge) cells for N65 staggered universal I/O libraries. 
CLN65ULP Standard I/O tpan65ulpgv2od3 130a (Limited Release) N65ULP 1.0V/2.5V, over-drive to 3.3V, universal analog I/O 

 

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